Channel Plus 8051 User Manual download pdf

August, 2014 − Rev. 6

1 Publication Order Number:

MC74LVX8051/D

MC74LVX8051

Analog Multiplexer/

Demultiplexer

High−Performance Silicon−Gate CMOS

The MC74LVX8051 utilizes silicon−gate CMOS technology to

achieve fast propagation delays, low ON resistances, and low OFF

leakage currents. This analog multiplexer/demultiplexer controls

analog voltages that may vary across the complete power supply range

(from V

to GND).

The LVX8051 is similar in pinout to the high−speed HC4051A and

the metal−gate MC14051B. The Channel−Select inputs determine

which one of the Analog Inputs/Outputs is to be connected, by means

of an analog switch, to the Common Output/Input. When the Enable

pin is HIGH, all analog switches are turned off.

The Channel−Select and Enable inputs are compatible with standard

CMOS outputs; with pull−up resistors they are compatible with

LSTTL outputs.

This device has been designed so that the ON resistance (R

) is

more linear over input voltage than R

of metal−gate CMOS analog

switches.

Features

• Fast Switching and Propagation Speeds

• Low Crosstalk Between Switches

• Diode Protection on All Inputs/Outputs

• Analog Power Supply Range (V

− GND) = 2.5 to 6.0 V

• Digital (Control) Power Supply Range (V

− GND) = 2.5 to 6.0 V

• Improved Linearity and Lower ON Resistance Than Metal−Gate

Counterparts

• Low Noise

• In Compliance With the Requirements of JEDEC Standard No. 7A

• Chip Complexity: LVX8051 − 184 FETs or 46 Equivalent Gates

• These Devices are Pb−Free and are RoHS Compliant

http://onsemi.com

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

ORDERING INFORMATION

MARKING DIAGRAMS

TSSOP−16

DT SUFFIX

CASE 948F

SOIC−16

D SUFFIX

CASE 751B

LVX8051G

AWLYWW

LVX8051 = Specific Device Code

A = Assembly Location

WL, L = Wafer Lot

Y = Year

WW, W = Work Week

G or G = Pb−Free Package

(Note: Microdot may be in either location)

LVX

8051

ALYWG

TSSOP−16

SOIC−16

1516 14 13 12 11 10

21 34567

X2 X1 X0 X3 A B C

X4 X6 X X7 X5 Enable NC GND

PIN ASSIGNMENT

1 2 3 4 5 6 ... 11 12

Summary of Contents

Page 1 - Demultiplexer

Page 2

MC74LVX8051http://onsemi.com10ORDERING INFORMATIONDevice Package Shipping†MC74LVX8051DR2G SOIC−16(Pb−Free)2500 Tape & ReelMC74LVX8051DTG TSSOP−16(

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MC74LVX8051http://onsemi.com11PACKAGE DIMENSIONSTSSOP−16CASE 948FISSUE BDIM MIN MAX MIN MAXINCHESMILLIMETERSA 4.90 5.10 0.193 0.200B 4.30 4.50 0.169 0

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MC74LVX8051http://onsemi.com12PACKAGE DIMENSIONSSOIC−16CASE 751B−05ISSUE KNOTES:1. DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2. CONTROLLING DI

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MC74LVX8051http://onsemi.com2LOGIC DIAGRAMMC74LVX8051Single−Pole, 8−Position Plus Common OffX013X114X215X312X41X55X62X74A11B10C9ENABLE6MULTIPLEXER/DEM

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MC74LVX8051http://onsemi.com3DC CHARACTERISTICS — Digital Section (Voltages Referenced to GND)SymbolParameter ConditionVCCVGuaranteed LimitUnit−55 to

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MC74LVX8051http://onsemi.com4AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 3 ns)SymbolParameterVCCVGuaranteed LimitUnit−55 to 25°C ≤85°C ≤125°CtPLH,

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MC74LVX8051http://onsemi.com5Figure 1a. Typical On Resistance, VCC = 3.0 V2520151050 1.0 2.0 3.0 4.0VIN, INPUT VOLTAGE (VOLTS)Ron, ON RESISTANCE (OHMS

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MC74LVX8051http://onsemi.com6Figure 3. Maximum Off Channel Leakage Current,Any One Channel, Test Set−UpFigure 4. Maximum Off Channel Leakage Current,C

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MC74LVX8051http://onsemi.com7Figure 9a. Propagation Delays, Channel Selectto Analog OutFigure 9b. Propagation Delay, Test Set−Up ChannelSelect to Anal

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MC74LVX8051http://onsemi.com8RLFigure 12. Crosstalk Between Any TwoSwitches, Test Set−UpFigure 13. Power Dissipation Capacitance, Test Set−UpFigure 14

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MC74LVX8051http://onsemi.com9ANALOGSIGNALFigure 15. Application Example Figure 16. External Germanium orSchottky Clipping Diodesa. Using Pull−Up Resis